Review on AMD FX-8320E FX-Series 8-Core Black Edition Processor by Boyan Donchev ᠌

Let's see: Piledriver vs. Bulldozer. The AMD engineering team has improved what? - better ability to predict branches - FMA4 support added, which allows instructions to have up to four operands (AMD still has the upper hand here because Intel's Haswell employs the more basic FMA3 instruction set, which only has three operands). - Support for the F16C extension was implemented (but only at the compiler level) in Visual Studio 2022. - a symmetrical four-way integer-core (two arithmetic-logic units and two ALUs). The ability to execute MOV instructions has been added, AGen. The design will reroute MOV instructions on these channels when AGen block activity is low. A boost from 32 to 64 entries was made to the L1 cache's rapid translation buffer (TLB). Boosting the L1 cache hit rate can greatly enhance performance in data-intensive applications due to the relatively high 20-clock latency of L2 TLB. While this is most noticeable in server contexts, AMD engineers have found that some games are also sensitive to this issue. Improvements have also been made to hardware sampling in L2. Cache latency for Sandra 2022 has not decreased because the minimum latency has not changed. However, thanks to better utilization of the prefetcher and L2 cache, AMD claims that average latency should decrease (although this is notoriously difficult to test). Therefore, Piledriver can achieve 15% more performance than the Bulldozer design in terms of performance per core and each clock cycle.